LogicVision, Inc. a provider of semiconductor built-in-self-test (BIST) and diagnostic solutions, today announced it has expanded its sales and customer service by the addition of Avant Technology Inc. as exclusive distributor for LogicVision products in Taiwan. LogicVision provides complete silicon test IP and methodology that spans SoC design and manufacturing test based on proprietary built-in-self-test (BIST) technologies for logic, memory and high-speed I/O. LogicVision's technologies enable SoC design teams to achieve single-digit DPM (defects-per-million) quality levels, accelerate time to working silicon by reducing silicon bring-up times from months to days, lower test preparation costs and reduce device test times, thus significantly improving product margins.

"Avant is a leader in providing IP and EDA solutions to the Taiwan semiconductor community," said James T. Healy, CEO of LogicVision. "Avant is expected to drive the adoption of LogicVision's tools in the rapidly growing Taiwan semiconductor market, enabling companies to realize significant competitive advantage through the adoption of LogicVision's test solutions."
"The addition of LogicVision solutions to our IP and EDA offerings will enable us to provide a broader set of solutions and services to our customers," said Yao-Chang Chang, General Manager of Avant Technology. "We are excited to add LogicVision's unique test solution to our portfolio of products to help Taiwan semiconductor companies address the increasing challenges of designing and testing complex semiconductor SoCs."

LogicVision Dragonfly Test Platform Launched

LogicVision, Inc. (NASDAQ:LGVN) , a provider of semiconductor built-in-self-test (BIST) and diagnostic solutions, today announced that it is introducing Dragonfly Test Platform(TM), the next generation of its test and diagnostic solutions. The new platform represents LogicVision's most advanced and comprehensive product portfolio. The Dragonfly Test Platform delivers the industry's most effective combination of test quality of results, ease-of-adoption, and test cost reductions specifically targeted for 65nm and 45nm system-on-chip (SoC) designs. Dragonfly also delivers new silicon diagnostics and characterization capabilities that accelerate yield ramps and enable same-day turnaround of silicon from the fab to known-good first sample shipments. The Dragonfly Test Platform will be showcased at the Design Automation Conference being held in Anaheim, California, June 9th through 12th.

"The IC market is under intense profit pressures, resulting in an increased emphasis on reducing all cost components. Reduction in cost per function is driving higher gate density, driving the growth of 65nm and 45nm design starts," said James T. Healy, President and CEO of LogicVision. "The new Dragonfly Test Platform will provide our customers with the key test, silicon bring-up and yield-ramp capabilities they need to meet rapidly increasing cost, quality, and schedule pressures."

Dragon Test Platform - Detail

The Dragonfly Test Platform is LogicVision's next generation of fully integrated embedded test solutions for manufacturing test, silicon bring-up and failure analysis of advanced SoC devices. Dragonfly delivers a comprehensive hierarchical BIST infrastructure covering memory, logic, and both regular and high-speed device I/Os. The BIST infrastructure is integrated using an advanced design automation tool flow fully compatible with all major EDA flows. Once in silicon, the BIST capabilities provide the most efficient quality versus test time trade-off of any manufacturing test methodology, enabling the most cost efficient single-digit DPM (defects-per-million) quality levels in the industry. The BIST capabilities can also be coupled with desktop or ATE-based diagnostic tools for accelerated silicon bring-up and failure analysis activities, both key in meeting shrinking product windows.

Efficient Memory BIST
The latest release of ETMemory(TM) within the Dragonfly Test Platform continues to improve an already best-in-class embedded memory test solution, delivering the most efficient memory BIST and self-repair solution in the industry. Depending on test requirements of individual memories, the new solution can implement either a very compact fixed-algorithm BIST engine or a more versatile fully programmable BIST engine. The combined enhancements deliver up to 30% reduction in area overhead. Both engine types support a self-repair option and are fully integrated into all of LogicVision's automated diagnostic and yield analysis solutions. The Dragonfly test platform also includes VHDL language support for memory BIST.

Streamlined Logic BIST
The latest release of ETLogic(TM) within the Dragonfly Test Platform delivers several new enhancements and capabilities aimed at significantly improving ease-of-adoption. These include a new and more efficient RTL rule checking engine for easy adoption by RTL designers; up to 20% area overhead reduction through simplification of scan control logic; and the capability to combine logic BIST with legacy cores that only support traditional scan based testing including support for double-capture at-speed test.

Advanced Diagnostics and Characterization
Silicon Insight(TM)-desktop provides comprehensive at-speed SoC device-level debug and characterization using a PC laptop connected to a device performance board through a USB-to-JTAG cable interface. The latest release of Silicon Insight adds support for GPIB-based bench top equipment, enabling design and test engineers to perform voltage and frequency based characterization from a laptop PC. Silicon Insight now makes it possible to perform full device debug, diagnostics and characterization without the need to access or tie-up expensive automatic test equipment.

On the production floor, Silicon Insight-ATE now adds the option to perform automated production data logging, enabling design teams and their foundry partners to analyze detailed failure and performance data. The production data log can be used with LogicVision's Yield Insight(TM) tool to identify systemic yield limiting issues and help accelerate product yield ramps.